Specifications & Components
- MCU
- ESP32-S3R8Dual-core 240 MHz; physical board rev 0.2
- PSRAM
- 8 MiB Octal80 MHz; dual canvases and runtime assets
- Flash
- 16 MiB QIO80 MHz; 8 MiB factory-app partition
- AMOLED
- CO53001.75-inch, 466×466, QSPI, RGB565
- Touch
- CST9217466×466 single-pointer path with dedicated INT / RST
- IMU
- QMI8658Six-axis, I²C 0x6B, 33 ms sampling
- RTC
- PCF85063I²C 0x51, backup power and trusted offline time
- PMIC
- AXP2101I²C 0x34, fuel gauge and software shutdown
- Audio
- ES8311 + NS4150B22.05 kHz mono; external speaker
- USB
- Native Serial/JTAGD-/D+ = GPIO19/20, flashing and debugging
- Storage
- microSD1-bit SDMMC; deliberately unmounted in this phase
- Framework
- ESP-IDF 5.5.4Waveshare BSP 3.0.1 + LVGL 9.4.0
Critical pins
| Function | GPIO / expander |
|---|---|
| LCD QSPI DATA0..3 | 4, 5, 6, 7 |
| LCD CS / PCLK / RST / TE | 12 / 38 / 39 / 13 |
| Touch INT / RST | 11 / 40 |
| Shared I²C SCL / SDA | 14 / 15 at 400 kHz |
| IMU INT2 | 21 |
| USB D- / D+ | 19 / 20 |
| UART0 TX / RX | 43 / 44 |
| I²S MCLK / BCLK / WS / DOUT | 42 / 9 / 45 / 8 |
| NS4150B PA | GPIO46, active high |
| PWR conditioned input | TCA9554 EXIO4, active high |
| SD CMD / CLK / D0 | 1 / 2 / 3 |
I²C addresses
| Component | 7-bit address | Project use |
|---|---|---|
| ES8311 | 0x18 | Audio codec output |
| TCA9554 | 0x20 | PWR EXIO4 and expansion control |
| AXP2101 | 0x34 | Battery, status and software shutdown |
| ES7210 | 0x40 | Microphone capability present, unused |
| PCF85063 | 0x51 | Trusted RTC |
| CST9217 | 0x5A | Touch |
| QMI8658 | 0x6B | Six-axis IMU |
Display memory budget
text
466 × 466 × 2 = 434,312 bytes
double canvas = 868,624 bytes8 MiB PSRAM comfortably fits the canvases, assets and runtime buffers, while internal SRAM remains scarce for stacks, DMA/driver state and hot paths. In the complex v7 scene, free internal heap is roughly 116–160 KiB with a measured minimum of 109,735 bytes; free PSRAM is about 6.06 MiB.
Software lock
- ESP-IDF
v5.5.4in an isolated project installation. - Waveshare BSP
3.0.1. - LVGL
9.4.0. - QIO Flash 80 MHz / 16 MiB.
- Octal PSRAM 80 MHz.
- CPU 240 MHz.
- RGB565 display, 466×466, 1:1 pixels.
Development safety boundary
Secure Boot, Flash Encryption and irreversible eFuses remain disabled during recoverable development. Production security needs a separate design and audit; it must never be enabled casually.